Introduction
Multilayer PCBs, defined as boards with 10 to 20 or more layers, pose greater manufacturing challenges and reliability demands compared to traditional multilayer boards. They are widely utilized in communications, high-end servers, medical electronics, aviation, industrial control, and military applications. Demand for high-layer count boards remains robust, especially in communications, base stations, aviation, and military sectors. With the rapid growth of China's telecom equipment market, the outlook for high-layer count boards is favorable.
Current Landscape
Domestic PCB manufacturers capable of mass-producing high-layer count boards are predominantly foreign-owned or a select few domestic enterprises. Production necessitates advanced technology, equipment investment, and technical/production expertise. Rigorous and cumbersome customer certification processes elevate the entry barrier, prolonging the path to industrialization.
Key Manufacturing Challenges
► Interlayer Alignment
With numerous layers, the interlayer alignment tolerance becomes increasingly stringent, typically ±75μm. Factors such as large unit sizes, environmental conditions in the pattern transfer workshop, and material expansion/contraction inconsistencies complicate alignment control.
► Inner Layer Circuit Fabrication
Special materials, including high-TG, high-speed, thick copper, and thin dielectric layers, pose significant production challenges. Smaller line widths and spacings lead to increased open and short circuits, lower yield rates, and higher chances of AOI misdetections. Thin core boards are prone to wrinkles, causing poor exposure and easy curling during etching. Most high-layer count boards are system boards with large unit sizes, resulting in high scrap costs.
► Lamination Challenges
Laminating multiple inner layers and prepregs can result in defects like sliding, delamination, resin voids, and bubble retention. Designing the lamination stack-up requires careful consideration of material heat resistance, voltage endurance, fill volume, and dielectric thickness. Inconsistencies in expansion/contraction control and size coefficient compensation across multiple layers, as well as thin interlayer insulating layers, can lead to interlayer reliability test failures.
► Drilling Challenges
Using special materials like high-TG, high-speed, thick copper types increases drilling roughness, burr formation, and debris removal difficulty. The cumulative copper thickness and board thickness of multiple layers makes drilling prone to drill bit breakage. Dense BGA arrangements and narrow hole wall spacings can cause CAF failures. Thick boards tend to cause drilling angle deviations.
Key Production Process Controls
♦ Material Selection:
The trend towards high-performance and multifunctional electronic components necessitates materials with low dielectric constants and losses, as well as low CTE and water absorption rates, to meet the processing and reliability requirements of high-layer count boards. For high-layer thick copper boards, high-resin prepregs are selected to fill inner layer patterns adequately. Excessively thick insulating layers can result in overly thick finished boards, while overly thin layers can cause delamination and high-voltage test failures.
♦ Lamination Stack-Up Design:
Key considerations in stack-up design include material heat resistance, voltage endurance, fill volume, and dielectric thickness. Key principles include:
- Consistency between prepreg and core board manufacturers.
- Avoidance of single sheets of 1080 or 106 prepregs (unless specified by customers) and ensuring interlayer dielectric thickness meets IPC-A-600G standards.
- Use of corresponding high-TG materials for core boards and prepregs when high-TG materials are required. Selection of high-resin prepregs for inner layers of 3OZ or more, while avoiding excessive use of 106 high-glue prepregs to prevent dimensional instability and lamination issues due to fine glass fiber collapse.
- Control of interlayer dielectric thickness tolerances within +/-10% unless specified otherwise, with tighter tolerances for impedance boards.
♦ Interlayer Alignment Control:
Achieving precise compensation for inner layer sizes and controlling production dimensions requires historical data analysis. High-precision, reliable interlayer positioning methods like four-slot positioning (Pin LAM) and hot melt with riveting are essential. Proper lamination processes and regular press maintenance are crucial for ensuring lamination quality. Interlayer alignment control involves considering factors such as inner layer compensation values, lamination positioning methods, lamination process parameters, and material characteristics.
♦ Inner Layer Circuitry Process:
Traditional exposure machines have a resolution of around 50μm. For high-layer count board production, laser direct imaging (LDI) can be introduced to improve resolution to around 20μm. Traditional machines have alignment accuracies of ±25μm, with interlayer alignment accuracies exceeding 50μm. High-precision alignment exposure machines can improve alignment accuracy to around 15μm, with interlayer alignment accuracy controlled within 30μm, reducing alignment deviations and improving accuracy for high-layer count boards. Engineering designs should compensate for line widths, spacings, and special patterns. Confirm the reasonableness of design compensations for inner layer line widths, spacings, isolation rings, independent lines, and hole-to-line distances. Control etching parameters and verify the first piece before mass production. Optimize etchant compositions to reduce side etching. Traditional etching equipment may require upgrades or replacement with high-precision etching equipment to improve etching uniformity and reduce defects.
♦ Lamination Process:
Choose suitable lamination methods based on product structure. For high-layer count boards, use four-slot positioning or hot melt with riveting. Control the lamination process to avoid defects like sliding and interlayer misalignment. Optimize heating rates and curves for complete resin flow and curing.
♦ Drilling Process:
Adjust drilling parameters for thicker boards to prevent drill bit breakage. Measure board expansion/contraction accurately. Use drills with high precision and control roughness within 25μm. High-density backing plates and limited drill grinding can reduce burrs. For high-frequency, high-speed boards, back drilling improves signal integrity by controlling stub lengths and hole position consistency.
